1. Field of the Invention
The present invention relates to semiconductor devices having therein a power semiconductor device such as an IGBT (Insulated Gate Bipolar Transistor) or a power MOSFET, and more particularly to such semiconductor devices with enhanced dielectric strength and short circuit protection capability.
2. Background Art
Enhanced dielectric strength and short circuit protection capability are required of semiconductor devices incorporating a power semiconductor device (or simply “power device”) which has a high voltage applied between its main electrodes. More specifically, such semiconductor devices must have a high dielectric strength and sufficient short circuit capability such that even if the load circuit connected between the main electrodes is short circuited, the power device does not degrade within a specified time period.
It is common for these semiconductor devices to include structures such as guard rings or field plates to increase the dielectric strength of the power device. A guard ring is, for example, a P-type region of an annular shape formed within an N-type substrate and surrounding the device region of the substrate in which the power device is formed. (Thus, the guard ring forms a PN junction with the substrate.) A plurality of guard rings are concentrically arranged to form a dielectric strength enhancing region. The guard rings function to reduce the electric field in the semiconductor layer of the semiconductor device in a known manner.
A field plate is an electrode disposed in an insulating film on the substrate surface of a power device between its gate and drain electrodes. It is common that a voltage approximately equal to the gate voltage is applied to the field plates of the power device. With this, the field plates function to reduce the electric field in the semiconductor layer of the semiconductor device in a known manner. Thus, guard rings and field plates are used to enhance the dielectric strength of semiconductor devices.
On the other hand, in order to improve the short circuit capability of a power device, its on-resistance may be increased to prevent a large current from flowing when a high voltage is applied between the main electrodes of the device. Other prior art techniques for enhancement of dielectric strength and short circuit protection are disclosed in the following patent publications.
Usually guard rings as described above are not connected to any source of potential, i.e. they are at a floating potential. Therefore, the electric field in the device tends to be stronger on the device region side (or inner side) of the device and weaker on its peripheral side. It has been found that this may result in the disadvantage that the depletion layer formed in the semiconductor layer in the device region does not extend a sufficient distance, preventing the device from having the desired dielectric strength. In such a case, it is necessary to increase the area of the dielectric strength enhancing region in order to enhance the dielectric strength. The use of field plates has also been found disadvantageous in that it may not sufficiently increase the dielectric strength of the device and may prevent miniaturization of the chip.
On the other hand, increasing the on-resistance of the power device to enhance its short circuit capability is accompanied by degradation of the electrical characteristics and performance of the device. That is, increasing the on-resistance makes it difficult to reduce the power consumption and increase the output power of the power device.